MosChip Technologies Limited: Complete Company Profile

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

Quick Facts / Company Snapshot

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

Company overview

MosChip Technologies Limited is an Indian publicly traded silicon and product engineering services company headquartered in Hyderabad, Telangana. Operating under the overarching engineering theme of “Silicon to Smart Systems,” the company partners with global enterprises across the technology development spectrum—ranging from discrete semiconductor design and full-cycle turnkey Application-Specific Integrated Circuit (ASIC) execution to embedded systems, hardware design, cloud engineering, artificial intelligence (AI), and product lifecycle sustenance.

Rather than treating chip design and system development as isolated tasks, MosChip structures its operations around an eight-layer engineering continuum. In complex electronic products, the transition between a physical semiconductor chip and a functional smart system requires seamless coordination across multiple intermediate layers. MosChip engineers across this entire vertical stack, allowing clients to engage the company for a specialized single-discipline work package, a multi-layer integration mandate, or complete specification-to-production ownership.

• Eight-Layer Engineering Stack: The company’s technical architecture spans silicon → package → board → firmware → operating system → application → cloud → intelligence, bridging lower-level semiconductor physics with upper-level digital and cognitive applications.
• Intersection Ownership Advantage: While Silicon Engineering governs the foundational layers and Product Engineering directs the upper layers, both units jointly own the middle intersection—package, board, and firmware—which is the exact junction where multi-vendor engineering programmes most frequently fail.
• Five Core Capitals: MosChip’s value-creation engine draws upon five distinct organizational capitals—Engineering Capital, Accelerators, Relationship Capital, Financial Capital, and Human and Social Capital—to compress customer time-to-market, reduce integration risk, and decouple revenue growth from linear headcount additions through reusable intellectual property.
• Customer Spectrum: The enterprise serves clients across the semiconductor and electronics value chain, including leading companies in Electronic Design Automation (EDA) tools, printed circuit boards (PCBs), Central Processing Units (CPUs), Graphics Processing Units (GPUs), System-on-Chips (SoCs), Field-Programmable Gate Arrays (FPGAs), Fortune 500 Original Equipment Manufacturers (OEMs), and Tier 1 and Tier 2 suppliers.

During Financial Year 2025-26 (FY26), MosChip reinforced its operational foundation by completing the corporate amalgamation of its wholly-owned subsidiaries, Softnautics Inc. and Softnautics Private Limited, into the parent entity following approval from the National Company Law Tribunal (NCLT) in March 2026. This structural consolidation unified the group’s silicon, embedded software, and digital engineering teams under a simplified corporate umbrella while expanding total leased office capacity to approximately 150,000 square feet across five design centers in India and the United States.

Business segments

Under statutory Business Responsibility and Sustainability Reporting (BRSR) classifications, 100% of MosChip Technologies Limited’s turnover is derived from a single reportable main activity: Design Services (National Industrial Classification Code 62011), encompassing Silicon, Product, and AI/ML engineering and design services. Operationally, the company executes this mandate through two primary, interconnected business units—Silicon Engineering Services and Product Engineering Services—supported by a suite of proprietary Solution Accelerators.

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Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

While the company reports a unified top line under Design Services, the Directors’ Report notes that the 25.34% year-on-year surge in consolidated operating income during FY26 was predominantly propelled by expanding revenues in Turnkey ASICs and IP Services, alongside sustained demand in embedded engineering services. Across both units, MosChip’s commercial model allows customers to engage flexibly—either contracting discrete engineering stages or handing over end-to-end programme accountability from initial architecture to volume production.

• Cumulative Silicon Track Record: The Silicon Engineering unit has completed 600+ silicon tapeouts, of which 200+ are complex SoC tapeouts, demonstrating process-node proficiency spanning mature 180nm geometries down to cutting-edge 2nm advanced nodes.
• Cumulative Product Engineering Footprint: The Product Engineering unit has delivered 500+ product engineering projects, encompassing 300+ hardware designs and 400+ device software and digital projects, ultimately enabling 35 million+ edge devices across industrial, consumer, and mobility markets.

Silicon Engineering Services

Silicon Engineering Services focuses on taking semiconductor programmes from initial specification through to validated production silicon. The business unit handles multi-billion-gate chip architectures and operates as an accredited member of the TSMC Design Center Alliance (DCA) ecosystem, giving clients direct access to advanced foundry workflows and verified design methodologies.

Its operational scope covers the entire pre-tapeout and post-tapeout lifecycle. Pre-tapeout execution encompasses chip architecture, Register-Transfer Level (RTL) design, functional verification, logic synthesis, Design for Testability (DFT), physical design and timing sign-off, low-power design, and analog/mixed-signal design and layout. Post-tapeout responsibilities extend into wafer tapeout coordination, redistribution layer (RDL) routing, substrate and package design, assembly, Automated Test Equipment (ATE) test development, tester board creation, post-silicon bring-up, and volume production support.

Product Engineering Services

Product Engineering Services integrates physical electronics hardware with embedded software and cloud-to-edge intelligence to turn raw silicon into connected, commercial-grade smart systems. Rather than executing isolated software tasks, the division assumes integrated engineering ownership across six core disciplines: Hardware & Systems, Device Software, Digital & Cloud, AI Engineering, Quality Engineering, and Lifecycle Services.

In FY26, MosChip prioritized scaling this division globally by recruiting senior sales and delivery leadership across Asia-Pacific, Japan, Europe, and North America. The division’s work bridges device-level constraints—such as signal integrity, power integrity, thermal dissipation, and real-time operating system (RTOS) determinism—with enterprise cloud architectures, digital twins, Over-The-Air (OTA) firmware updates, and on-device machine learning.

History and evolution

MosChip Technologies Limited has evolved over twenty-seven years from a pioneering domestic fabless chip designer into a multi-disciplinary global silicon and product engineering organization.

• 1999 – Foundation: MosChip was incorporated in 1999 in Hyderabad, Telangana, establishing its roots in semiconductor design for the physical world.
• 2001 – Public Listing & US Expansion: In 2001, MosChip became India’s first publicly listed fabless semiconductor company. On May 7, 2001, the company acquired its wholly-owned North American subsidiary, MosChip Technologies, USA, incorporated in California, to anchor its presence in Silicon Valley.
• 2018 – Establishment of Training & Innovation Subsidiary: On July 23, 2018, the company acquired its wholly-owned domestic training and skill-development subsidiary, MosChip Institute of Silicon Systems Private Limited, to build an internal pipeline of specialized VLSI and embedded systems engineers.
• April–May 2025 – Corporate Restructuring & Subsidiary Rebranding: Effective April 4, 2025 (the appointed date), the Board initiated the amalgamation of its wholly-owned subsidiaries, Softnautics Inc. and Softnautics Private Limited, into MosChip Technologies Limited. Shortly thereafter, on May 6, 2025, MosChip Institute of Silicon Systems Private Limited was officially renamed MosChip Academy of Silicon Systems & Technologies Private Limited (MAST).
• April–September 2025 – Employer Recognition, Credit Rating & Semicon India: In April 2025, MosChip ranked 13th among LinkedIn’s Top 15 Mid-Size Companies in India for career growth. On July 10, 2025, CRISIL Ratings Limited assigned the company a long-term bank facility rating of CRISIL BBB+/Stable. In September 2025, the company showcased its Turnkey ASIC, Silicon Design, and hardware engineering capabilities at Semicon India.
• October–December 2025 – AI Accelerators, Facility Expansion & Edge AI Partnership: In October 2025, MosChip launched its AgenticSky™ solution accelerators and expanded into larger office facilities across Bengaluru, Pune, and Hyderabad, adding 35,000 square feet of space. Between October and November 2025, it unveiled ProductXcelerate™ hardware-to-AI blueprints. In December 2025, MosChip announced a strategic collaboration with EMASS (a Nanoveu company) on a 22nm ultra-low-power Edge AI SoC.
• January–March 2026 – Space Silicon Delivery & NCLT Merger Approval: In January 2026, MosChip announced the successful silicon bring-up and delivery of a custom 28nm SoC in packaged silicon form for SAC/ISRO (Space Applications Centre / Indian Space Research Organisation) supporting India’s satellite navigation programme. In March 2026, the Hon’ble NCLT, Hyderabad approved the Softnautics amalgamation scheme, dissolving both Softnautics entities into the parent company.

Products and services

In accordance with its statutory reporting boundary, MosChip classifies 100% of its commercial output under Design Services (NIC Code 62011). Within this overarching category, the company delivers nine specialized service lines across Silicon and Product Engineering, alongside custom semiconductor development programmes.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

To understand how MosChip generates value across industries, each of its core service offerings is profiled in detail below.

Turnkey ASIC Services

Turnkey ASIC Services provides single-owner accountability from chip specification through to volume production. MosChip manages every stage of the semiconductor supply chain on behalf of clients: system architecture definition, RTL design, functional and formal verification, physical implementation and timing sign-off, wafer tapeout coordination with foundries, RDL routing, substrate and package design, assembly, ATE test program development, custom evaluation and tester boards, post-silicon lab bring-up, and production yield management. During FY26, turnkey execution expanded in North America and anchored national strategic programmes in 5nm high-performance computing, 22nm Edge AI, and 28nm satellite navigation.

Semiconductor Design Services

For clients requiring specialized engineering intervention rather than full turnkey ownership, MosChip offers modular Design Services across ASIC, SoC, and FPGA programmes. Capabilities include RTL design and verification, logic synthesis, Design for Testability (DFT) architecture and verification, physical design from netlist to GDSII, low-power design techniques, and custom analog and mixed-signal circuit design and layout. Engineers execute complex multi-core and chiplet architectures incorporating high-speed interconnects such as PCIe and SerDes alongside High Bandwidth Memory (HBM).

IP Services

IP Services encompasses the creation, porting, customization, and integration of silicon-proven intellectual property blocks into new foundry process nodes, performance envelopes, and custom product architectures. MosChip’s internal R&D and IP portfolio includes mixed-signal IPs, SerDes interfaces, custom IP blocks, and foundational subsystems required to accelerate complex SoC tapeouts.

Hardware & Systems Engineering

Within Product Engineering, the Hardware & Systems practice designs manufacturable physical platforms and electronic boards. Engineers execute high-speed multi-layer PCB and platform design, Signal Integrity (SI), Power Integrity (PI), thermal modeling, Electromagnetic Compatibility (EMC) engineering, mechanical ruggedisation for harsh industrial environments, board bring-up, system validation, pre-certification testing, and component obsolescence management.

Device Software Engineering

Device Software bridges physical hardware and upper-level applications. The practice develops low-level firmware, Board Support Packages (BSPs), Microcontroller Abstraction Layers (MCAL), and custom device drivers. It also handles Operating System enablement across Real-Time Operating Systems (RTOS), embedded Linux, and Android stacks, alongside wireless connectivity protocols (including Matter), multimedia and vision pipelines, device security, diagnostics, and Over-The-Air (OTA) update readiness.

Digital & Cloud Engineering

Digital & Cloud Engineering builds the connected ecosystem surrounding physical devices. Services include cloud-native architecture development, IoT device onboarding and fleet management, enterprise data engineering, interactive digital twins for industrial assets, web and mobile companion applications, and full digital lifecycle engineering.

AI Engineering

AI Engineering embeds cognitive and autonomous intelligence into edge devices and enterprise workflows. The team develops computer vision algorithms, manages end-to-end Machine Learning (ML) lifecycles, integrates Generative AI (GenAI), and architects Agentic AI solutions optimized for deployment across heterogeneous compute targets including CPUs, GPUs, and FPGAs.

Quality Engineering

Quality Engineering provides comprehensive verification and validation across hardware, embedded firmware, and digital software layers. Offerings cover automated device and embedded testing, QA test automation, DevOps pipeline integration, ML model testing, and compliance validation aligned with functional-safety and automotive software development frameworks.

Lifecycle Services

Lifecycle Services ensures long-term commercial viability for deployed hardware and software products. MosChip handles legacy product modernisation, contract manufacturing support, silicon and FPGA platform migration, ongoing software sustenance, Bill of Materials (BoM) cost optimisation, and end-of-life (EoL) engineering.

Brand portfolio

While MosChip Technologies Limited markets its core engineering capabilities under the corporate MosChip brand, the company has developed a portfolio of proprietary solution accelerator suites, vertical hardware-to-AI blueprint brands, indigenous silicon product brands, and an institutional training brand. These branded assets are deployed selectively within customer engagements or developed as strategic intellectual property to shorten development cycles and create long-term licensing and product opportunities.

AgenticSky™

Launched in October 2025, AgenticSky™ is MosChip’s proprietary suite of Agentic AI solution accelerators designed to speed up the development of autonomous, AI-enabled products across healthcare, wearables, industrial automation, and consumer electronics. Built around a four-stage cognitive loop—Perceive → Interpret → Decide → Engage—AgenticSky™ provides modular, reusable cores:

• VisionCore: Accelerates computer vision, automated object recognition, and visual perception workloads at the edge.
• HMICore: Powers intelligent Human-Machine Interaction, voice, and contextual interface experiences.
• ControllerCore: Enables autonomous device control and adaptive operational logic.
• WearableCore: Delivers on-device AI for health tracking and athlete biometric performance monitoring—deployed commercially in FY26 when MosChip was appointed Official Technology Partner to the Kerala Blasters FC professional football club.
• RoboticCore: Provides foundational autonomy and motion/control intelligence for robotics applications.

ProductXcelerate™ (ProductXlerate)

Introduced and showcased between October and November 2025, ProductXcelerate™ (also referred to in the report as ProductXlerate) is a suite of pre-validated, vertical-ready hardware-to-AI engineering blueprints. Designed so customer product programmes do not have to start from zero, ProductXcelerate™ encompasses five specialized reference blueprints:

• Automotive SDV Gateway: An automotive-grade gateway hardware platform featuring vehicle networking, edge-to-cloud telemetry, and software lifecycle management for Software-Defined Vehicles (SDVs).
• Industrial & BMS Edge Gateway: Ruggedized edge gateway hardware supporting multi-protocol industrial connectivity across Modbus, OPC-UA, and BACnet, Operational Technology–Information Technology (OT-IT) data integration, secure device onboarding, and edge analytics for predictive maintenance and Building Management System (BMS) energy optimization.
• Wearable Companion: A low-power hardware and Android software stack with secure connectivity and on-device AI tailored for continuous health tracking, proactive medical alerts, and elderly safety monitoring.
• Retail Auto-Checkout Kiosk: Vision-enabled kiosk hardware integrated with biometric peripherals and edge AI to perform automated product recognition, assisted self-checkout, and retail audience analytics.
• Home Automation Bridge: Multi-protocol smart-home controller hardware equipped with Matter-ready firmware, secure onboarding, protocol bridging, and OTA lifecycle management.

DigitalSky GenAIoT

DigitalSky GenAIoT is MosChip’s reusable digital foundation suite spanning Internet of Things (IoT) device connectivity, cognitive intelligence, workflow automation, and digital-native application experiences for connected products. It standardizes repetitive engineering tasks such as device onboarding, cloud dashboard construction, and model deployment across customer programmes.

VIDYUT (Indigenous Smart Energy Meter IC)

VIDYUT is MosChip’s flagship indigenous Smart Energy Meter Integrated Circuit (IC) programme, approved under the Government of India’s Design Linked Incentive (DLI) scheme and targeting both domestic and export utility markets. Engineered to support smart grid deployments, Advanced Metering Infrastructure (AMI), and utility digitization, VIDYUT integrates accurate energy measurement, real-time processing, secure communication, and advanced monitoring onto an optimized semiconductor platform. During FY26, MosChip validated key analog and digital subsystems (including processor and energy computation modules) via multiple test-chip implementations and finalized the communication protocol stack, scheduling the main full-chip tapeout for Q1 FY27 and production tapeout for Q1 FY28 (Management target).

AUM (5nm Indigenous HPC Processor)

AUM is a 5nm high-performance computing (HPC) processor SoC being developed by MosChip in consortium with Socionext for the Centre for Development of Advanced Computing (C-DAC) under the Government of India’s National Supercomputing Mission (NSM). MosChip’s turnkey ASIC scope on the 5nm AUM programme covers advanced-node physical implementation, high-speed interconnects, chiplet-based architectures, High Bandwidth Memory (HBM) integration, verification, packaging, tapeout, post-silicon validation, and volume production.

MAST (MosChip Academy of Silicon Systems & Technologies)

MAST (operated via wholly-owned subsidiary MosChip Academy of Silicon Systems & Technologies Private Limited) is MosChip’s dedicated training and innovation academy. It provides hands-on curriculum in VLSI silicon design and embedded software to bridge the industry-academia gap and cultivate entry-level engineering talent for advanced-node programmes.

Geographical presence

MosChip Technologies Limited operates a global sales and engineering delivery footprint spanning India, North America, Asia-Pacific, and Europe. According to the company’s BRSR disclosures, MosChip maintains 5 operational office locations (4 national and 1 international), actively serving markets across 4 Indian states and 4 primary international countries, alongside newly established customer engagements in Europe during FY26.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

The foreign exchange data reveals a dramatic shift in MosChip’s international trade balance during FY26. While standalone foreign exchange earnings surged by 69.89% (Calculated by FirmsWorld) to ₹20,069.77 lakhs—representing 38.51% of standalone operating revenue of ₹52,122.02 lakhs (Calculated by FirmsWorld)—foreign exchange outgo declined by 17.00% (Calculated by FirmsWorld), turning a prior-year net forex deficit into a net foreign currency surplus of ₹9,948.43 lakhs (Calculated by FirmsWorld).

India (Telangana, Karnataka, Gujarat, and Maharashtra)

India serves as MosChip’s corporate headquarters, primary R&D hub, and largest revenue region, accounting for 62.00% of total turnover (Calculated by FirmsWorld). The company operates four national design centers located in Hyderabad (Telangana), Bengaluru (Karnataka), Ahmedabad (Gujarat), and Pune (Maharashtra). During October 2025, MosChip expanded into larger office spaces in Bengaluru, Pune, and Hyderabad to accommodate headcount growth and increase engineering delivery capacity. Domestically, MosChip is deeply embedded in national strategic initiatives, executing the 28nm satellite navigation SoC for SAC/ISRO, the 5nm AUM supercomputing processor for C-DAC, and the VIDYUT Smart Energy Meter IC under the Government of India’s DLI scheme.

North America (United States)

North America represents MosChip’s anchor international market, operated through its Santa Clara, California office and wholly-owned subsidiary MosChip Technologies, USA. In FY26, the US subsidiary generated ₹20,862.55 lakhs in turnover and ₹1,109.68 lakhs in profit after tax. During the year, MosChip expanded its Turnkey ASIC business development and Product Engineering sales leadership across North America, earning a significant share of its revenue in US dollars while leveraging its India design centers for cost-efficient execution.

Asia-Pacific (Japan, South Korea, and Singapore)

MosChip actively serves clients in Japan, South Korea, and Singapore, strengthening its Asia-Pacific sales leadership during FY26 to reduce geographic concentration risk. In South Korea—highlighted by management as one of the world’s most significant semiconductor markets—and Japan, the company established and grew strategic customer engagements across both semiconductor and product engineering services.

Europe

During FY26, MosChip entered Europe as a new strategic growth market alongside South Korea. The company appointed dedicated regional leadership to capture European demand in automotive electronics, industrial automation, and semiconductor design.

Profit and loss

MosChip Technologies Limited delivered substantial top-line and bottom-line expansion in FY 2025-26. Following the NCLT-approved amalgamation of Softnautics Inc. and Softnautics Private Limited effective April 4, 2025, the company accounted for the merger under the pooling of interests method in accordance with Appendix C to Ind AS 103 and restated its comparative FY 2024-25 figures.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

An examination of the income statement highlights how deliberate capability investments shaped MosChip’s margins during FY26. While consolidated revenue from operations expanded by ₹11,830.65 lakhs (Calculated by FirmsWorld), EBITDA grew at a more moderated pace of 8.62% (reported as 8.64% on rounded crore figures). As explained by CFO Mr. Jayaram Susarla, this margin compression reflects upfront operating investments in hiring 300+ net new engineers, appointing global sales leaders across North America, Europe, and Asia-Pacific, and leasing an additional 35,000 square feet of office infrastructure.

• Sharp Reduction in Finance Costs: Consolidated interest expense fell by 35.66% (Calculated by FirmsWorld) from ₹747.96 lakhs to ₹481.26 lakhs, driven by treasury optimization of the borrowing mix to lower the overall cost of funds.
• Pre-Exceptional Earnings Surge: Because depreciation remained slightly lower (-1.05%, Calculated by FirmsWorld) and interest costs dropped substantially, consolidated Profit Before Tax (before the ₹581.86 lakh exceptional item, Calculated by FirmsWorld) climbed 23.97% to ₹41.58 crore, nearly matching the 25.34% top-line growth rate.
• Effective Tax Rate Dynamics: On a consolidated basis, tax expenses of ₹55.81 lakhs on post-exceptional PBT of ₹3,576.24 lakhs represent an effective tax rate of 1.56% (Calculated by FirmsWorld), aided by a tax credit of ₹(66.57) lakhs recorded in the US subsidiary.

Five-Year Revenue and Multi-Year Profitability Trajectory

MosChip’s FY26 performance caps a five-year period of rapid expansion, during which consolidated revenue from operations achieved a Compound Annual Growth Rate (CAGR) of 41%.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

Over the five-year span from FY22 to FY26, MosChip nearly quadrupled its revenue base (3.95x growth, Calculated by FirmsWorld). Equally important, the company’s PBT-to-Revenue ratio expanded from 3.9% in FY24 and FY25 to 7.0% in FY26, demonstrating operating leverage as fixed corporate overheads were absorbed across a much larger revenue base.

Balance sheet

MosChip Technologies Limited maintains a debt-light balance sheet characterized by high cash liquidity and steady net worth accumulation, reinvesting internal cash generation back into engineering capabilities rather than distributing dividends.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

Six-Year Net Worth Expansion and Financial Ratios

Between FY21 and FY26, MosChip’s consolidated net worth expanded at a CAGR of approximately 50.5%, rising nearly eightfold (7.72x, Calculated by FirmsWorld) on the back of organic earnings retention and inorganic expansions.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

Management’s commentary on the financial ratios explains the working capital shifts observed during FY26:

• Liquidity Cushion vs. Short-Term Debt: Although short-term borrowings increased to ₹35.95 crore—raising the Debt-Equity ratio from 0.06 to 0.22 and lowering the Debt Service Coverage Ratio from 4.26 to 1.74—the company held ₹149.28 crore in cash, bank balances, and fixed deposits as of March 31, 2026, covering its short-term debt 4.15 times over (Calculated by FirmsWorld).
• Working Capital Cycle Adjustments: The moderation in the Current Ratio (from 2.39 to 1.62) and Trade Payables Turnover Ratio (from 9.93 to 2.69) stemmed from higher current liabilities and trade payables, while the shift in Trade Receivables Turnover (from 5.19 to 3.86) reflected higher year-end trade receivables accompanying the 25.34% surge in operating scale.
• ESOP-Driven Share Capital Expansion: During FY26, MosChip allotted 27,88,245 equity shares across 12 tranches upon employees exercising stock options, followed by four post-balance-sheet allotments totaling 8,45,809 additional shares (Calculated by FirmsWorld) between April 13, 2026 (2,66,939 shares), May 20, 2026 (85,604 shares), June 16, 2026 (2,50,630 shares), and July 15, 2026 (2,42,636 shares).

Cash flow

Strong operating cash generation during FY 2025-26 enabled MosChip to self-fund its capital expenditure requirements while strengthening its treasury liquidity reserves.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

Generating ₹92.80 crore in operating cash flow against ₹35.20 crore in consolidated net profit indicates disciplined cash collection and non-cash expense conversion. After deploying ₹30.27 crore into capital investments—supporting expanded engineering delivery centers in Hyderabad, Bengaluru, and Pune, Disaster Recovery Planning infrastructure, and ongoing R&D capitalization—MosChip retained ₹62.53 crore in net post-capex operating cash flow (Calculated by FirmsWorld). Furthermore, the company did not raise any external funds via preferential allotment or qualified institutional placement during FY26, nor did it accept any public deposits.

Board of directors and leadership team

As of March 31, 2026, MosChip Technologies Limited is governed by a nine-member Board of Directors comprising 1 Executive Director, 3 Non-Executive Non-Independent Directors, and 5 Independent Directors (including 1 Woman Independent Director), led by an Independent Non-Executive Chairman.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

Profiles of the Board of Directors

• Mr. K. Pradeep Chandra (Chairman & Independent Director): Appointed to the Board on April 27, 2018, Mr. Chandra holds a BTech, MBA, and PhD, bringing core competencies in Technology, Strategy & Planning, and General Management & Entrepreneurship. He attended all 6 Board meetings during FY26 and also serves as an Independent Director on the board of listed entity M/s. Orient Electric Limited.
• Mr. Srinivasa Rao Kakumanu (Managing Director & CEO): Appointed on October 26, 2023, Mr. Kakumanu holds a Bachelor of Engineering (BE) degree and possesses recognized expertise in Technology and General Management & Entrepreneurship. He holds 10,00,000 equity shares (0.52% of total equity) and drew a fixed salary of ₹3,06,00,000 in FY26, representing 29.12 times the median employee remuneration.
• Mr. D. G. Prasad / Govinda Prasad Dasu (Independent Director): A Chartered Accountant (CA) appointed on May 28, 2018, Mr. Prasad contributes expertise across Banking & Finance, Strategy & Planning, Laws & Policies, and General Management. He chairs both the Audit Committee and the Risk Management Committee and attended all 6 Board meetings in FY26.
• Mrs. Madhurika Nalluri Venkat (Independent Director): Holding a Bachelor of Laws (BL) degree and serving on the Board since August 13, 2019, Mrs. Venkat specializes in Banking & Finance, Strategy & Planning, and General Management. She chairs the Nomination & Remuneration Committee and the Stakeholders Relationship Committee, and attended all 6 Board meetings during the year.
• Mr. Damodar Rao Gummadapu (Promoter & Non-Executive Director): A Chartered Accountant (CA) appointed on April 27, 2018, Mr. Gummadapu is a Promoter Director holding 20,600 equity shares and 7 directorships in other companies. His board skill areas cover Technology, Banking & Finance, and Strategy & Planning.
• Mr. G. V. Pranav Reddy (Non-Executive Director): Appointed on November 4, 2023, Mr. Reddy holds a Bachelor’s degree in Finance and Business Management and serves on the boards of 6 other companies.
• Mr. Vinayendra Parvathaneni (Non-Executive Director): Also appointed on November 4, 2023, Mr. Parvathaneni holds an MS in Global Management and a BSc (Hons) in Management. He holds 14,010 equity shares, serves on the Audit and Risk Management Committees, and attended all 6 Board meetings in FY26.
• Dr. Yellamanchali Sreenivasa Rao (Independent Director): Appointed effective October 24, 2025 (confirmed by shareholders via Postal Ballot on January 20, 2026 with 99.9883% votes in favour), Dr. Rao holds a PhD in Mechanical Engineering and serves on the Audit and Risk Management Committees.
• Mr. Sandeep Himmatlal Shah (Independent Director): Appointed effective October 24, 2025 (confirmed via Postal Ballot with 99.9841% votes in favour), Mr. Shah holds an MBA in Finance, an MS in Electrical Engineering, and a BE in Electronics & Communications Engineering, serving on the Audit and Risk Management Committees.

Board Committees, Key Managerial Personnel (KMP), and Senior Management

The Board discharges its oversight responsibilities through four statutory committees:

1. Audit Committee (6 meetings in FY26): Chaired by Mr. D. G. Prasad, with members Mr. K. Pradeep Chandra, Mrs. Madhurika Nalluri Venkat, Mr. Vinayendra Parvathaneni (w.e.f. 06.06.2025), Mr. Sandeep Himmatlal Shah (w.e.f. 24.10.2025), and Dr. Yellamanchali Sreenivasa Rao (w.e.f. 24.10.2025).
2. Nomination & Remuneration Committee (5 meetings in FY26): Chaired by Mrs. Madhurika Nalluri Venkat, with members Mr. K. Pradeep Chandra, Mr. D. G. Prasad, and Mr. Damodar Rao Gummadapu.
3. Stakeholders Relationship Committee (1 meeting in FY26): Chaired by Mrs. Madhurika Nalluri Venkat, with members Mr. K. Pradeep Chandra and Mr. Damodar Rao Gummadapu.
4. Risk Management Committee (2 meetings in FY26): Chaired by Mr. D. G. Prasad, with members Mrs. Madhurika Nalluri Venkat, Mr. Vinayendra Parvathaneni, Mr. Sandeep Himmatlal Shah, and Dr. Yellamanchali Sreenivasa Rao.

Alongside MD & CEO Mr. Srinivasa Rao Kakumanu, MosChip’s Key Managerial Personnel (KMP) include Mr. Jayaram Susarla (Chief Financial Officer)—whose remuneration in FY26 stood at 12.12 times the median employee salary (+2.16% YoY)—and Mr. Suresh Bachalakura (Company Secretary & Compliance Officer), whose remuneration stood at 3.58 times the median employee salary (+11.63% YoY). Operational execution across business units is led by six Senior Management Personnel:

• Mr. Swamy Irrinki: Promoted to Executive Vice President (EVP) – Business Development effective May 22, 2025.
• Mr. Giri Kondaveeti: Senior Vice President (SVP) – IT & Security (joined December 1, 2010).
• Mr. D. V. R. Murthy: Senior Vice President (SVP) – Strategic Programs (joined July 1, 2023).
• Mr. Vishal Patil: Senior Vice President (SVP) – Product Engineering Services (PES) (joined November 1, 2023).
• Mr. Sribash Dey: Senior Vice President (SVP) – Business Development (joined November 1, 2023).
• Mrs. Sri Lakshmi Simhadri: Vice President (VP) – Silicon Systems / Engineering Services (SSS) (joined February 27, 2024).

Subsidiaries, associates, joint ventures

As of March 31, 2026, MosChip Technologies Limited has 2 wholly-owned (100%) unlisted subsidiaries and no associate companies or joint ventures within the meaning of the Companies Act, 2013. Two former wholly-owned subsidiaries—Softnautics Inc. and Softnautics Private Limited—were dissolved and merged into MosChip Technologies Limited during FY26 pursuant to the NCLT Hyderabad order dated March 25, 2026 (effective from April 4, 2025).

Source: MosChip Technologies Limited 27th Annual Report 2025-2026 (Form AOC-1).

MosChip Technologies, USA

Incorporated in California on May 7, 2001, MosChip Technologies, USA is designated as a material subsidiary of the company. Its financial accounts are translated at a year-end exchange rate of ₹93.85 per USD as of March 31, 2026. Generating ₹20,862.55 lakhs in turnover and ₹1,109.68 lakhs in net profit after tax (representing 31.52% of consolidated net profit, Calculated by FirmsWorld), the subsidiary serves as the primary commercial interface and engineering support hub for MosChip’s North American semiconductor and product engineering client base. As of March 31, 2026, it held total assets of ₹5,480.46 lakhs and net equity (share capital plus reserves) of ₹2,265.79 lakhs (Calculated by FirmsWorld).

MosChip Academy of Silicon Systems & Technologies Private Limited (MAST)

Acquired on July 23, 2018 and renamed from MosChip Institute of Silicon Systems Private Limited effective May 6, 2025, MAST operates as MosChip’s specialized training and innovation subsidiary. In FY26, MAST recorded a turnover of ₹558.32 lakhs and a profit before and after tax of ₹50.05 lakhs on total assets of ₹525.05 lakhs. Beyond its standalone financial contribution, MAST plays a vital strategic role by training entry-level campus graduates in advanced-node VLSI design, verification, and embedded systems to supply MosChip’s core delivery teams.

Other Investments (Including Minority / Portfolio Holdings)

Per Form AOC-1 and the Corporate Governance disclosures in the 27th Annual Report, neither MosChip Technologies, USA nor MosChip Academy of Silicon Systems & Technologies Private Limited held any external portfolio investments (₹0 investments) as of March 31, 2026, and the company had zero exposure to derivative or commodity instruments during the year. Instead of allocating capital to passive minority equity holdings, MosChip’s treasury policy prioritizes maintaining liquid reserves—holding ₹149.28 crore in cash, bank balances, and fixed deposits as of March 31, 2026—while governing inter-corporate loans, advances, and subsidiary investments under Section 186 of the Companies Act, 2013 and Audit Committee oversight.

Physical properties (offices, plants, factories, etc.)

MosChip Technologies Limited operates an asset-light, design-centric physical footprint comprising 5 Design Centers (4 in India and 1 in the United States) alongside a component assembly plant and design center at its Hyderabad headquarters. During FY 2025-26, the company leased an additional 35,000 square feet of office space across multiple cities, expanding its total leased office capacity to approximately 150,000 square feet. Its leased facility incorporates green building standards under Leadership in Energy & Environmental Design (LEED) certification obtained by property owner Aqua Space Developers Private Limited.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

Founders

Established in 1999 and taken public in 2001 as India’s first listed fabless semiconductor enterprise, MosChip Technologies Limited’s promoter group is represented on the Board of Directors by Mr. Damodar Rao Gummadapu (DIN: 07027779), who serves as Promoter and Non-Executive Director. A qualified Chartered Accountant (CA) appointed to the Board on April 27, 2018, Mr. Gummadapu personally holds 20,600 equity shares and serves on the Nomination & Remuneration Committee and the Stakeholders Relationship Committee. Collectively, the two registered Promoter entities/holders own 7,72,24,928 equity shares, representing 39.83% of the company’s total paid-up equity capital as of March 31, 2026.

Parent

MosChip Technologies Limited (CIN: L31909TG1999PLC032184) is an independent, publicly listed corporation on the NSE and BSE and serves as the ultimate parent and holding company of the MosChip Group. Following the NCLT-sanctioned amalgamation of Softnautics Inc. and Softnautics Private Limited effective April 4, 2025, MosChip Technologies Limited directly owns 100% of the equity share capital of its two operating subsidiaries: MosChip Technologies, USA and MosChip Academy of Silicon Systems & Technologies Private Limited. On a standalone basis, the parent entity generated 89.07% of the group’s consolidated income from operations (₹52,122.02 lakhs out of ₹58,514.84 lakhs, Calculated by FirmsWorld) and 67.12% of consolidated net profit (₹2,362.92 lakhs out of ₹3,520.43 lakhs, Calculated by FirmsWorld) in FY26.

Investments and capital expenditure plans

During FY 2025-26, MosChip executed ₹30.27 crore in capital investments, funded entirely from its ₹92.80 crore in operating cash flow. Rather than making capital investments in energy conservation equipment—given that its design operations have intrinsically low energy intensity—MosChip directs its capital expenditure and R&D spending toward engineering infrastructure, proprietary silicon IP, and business continuity systems.

• Office & Delivery Infrastructure Expansion: Leased an additional 35,000 sq. ft. across Bengaluru, Pune, and Hyderabad (bringing total leased space to ~150,000 sq. ft.) and initiated upgrades to its Disaster Recovery Planning (DRP) infrastructure to strengthen operational resilience.
• Capitalized R&D & Indigenous IP Creation: In accordance with applicable accounting standards, MosChip continuously invests in internal R&D and capitalizes qualifying development costs. Specific R&D focus areas disclosed in Annexure E include its Advanced Lighting Automation Solution, Indigenous Asset Monitoring Platform, SerDes, and other mixed-signal and custom IP products.
• Smart Energy Meter IC (VIDYUT) Commercialization Roadmap: Having completed test-chip validation of key analog and digital subsystems and finalized the communication protocol stack in FY26, MosChip is investing in the next phase of its DLI-approved Smart Energy Meter IC, targeting main full-chip tapeout in Q1 FY27 and production tapeout in Q1 FY28 (Management target).
• Corporate Social Responsibility (CSR) Investments: In compliance with Section 135 of the Companies Act, 2013, MosChip deployed ₹30,85,000 (Calculated by FirmsWorld from itemized project contributions) across four educational and sports development initiatives in FY26:
  • University College of Engineering, Osmania University, Hyderabad: ₹14,00,213 for 60 student tables and 4 interactive flat panels.
  • Olympic Gold Quest (OGQ), Mumbai: ₹10,00,000 for athlete training, sports science, coaching, equipment, and stipends.
  • Saraswathi Vidya Mandir High School, Hyderabad: ₹4,42,500 for 3 interactive digital classroom panels.
  • Sports Coaching Foundation, Hyderabad: ₹2,42,287 for sports equipment, infrastructure, and grassroots coaching camps for children from economically weaker sections.

Shareholding pattern

As of March 31, 2026, MosChip Technologies Limited’s paid-up equity share capital stood at ₹38,77,33,074, divided into 19,38,66,537 equity shares of face value ₹2/- each, held across 3,57,850 shareholders. Exactly 99.76% of the company’s shares are held in electronic dematerialized form (59.12% via NSDL covering 11,46,10,904 shares, and 40.64% via CDSL covering 7,87,98,709 shares), while only 0.24% (4,56,924 shares) remain in physical form.

Source: MosChip Technologies Limited 27th Annual Report 2025-2026.

A closer look at the distribution schedule as of March 31, 2026 shows a dual ownership structure combining broad retail participation with concentrated institutional and promoter holdings:

• Retail Breadth vs. Top-Tier Concentration: While 98.61% of shareholder cases (3,52,878 holders) are small retail investors holding between 1 and 5,000 shares—collectively accounting for 30.69% of equity (5,94,97,349 shares)—just 117 large holders (0.03% of cases, holding 1,00,001 shares and above) hold 51.57% of the company (9,99,76,662 shares).
• Broad-Based Employee Ownership: Through seven active Employee Stock Option Plans—MosChip Stock Option Plans 2005(MI), 2005(WOS), 2008, 2008(ALR), 2018, 2022, and 2024—515 employees directly hold 45,09,865 shares (2.33%), supplemented by 1,97,470 shares (0.10%) in the Employees Welfare Trust, 10,00,000 shares (0.52%) held by MD & CEO Mr. Srinivasa Rao Kakumanu, and 47,287 shares (0.02%) held by KMP.

Future strategy

MosChip’s management has articulated a clear, five-pillar strategic roadmap (“Five Priorities. One Direction”) alongside long-term ESG commitments to guide the company through its next phase of expansion:

1. Deepen Advanced-Node Silicon: Continue expanding specialized RTL design, verification, physical implementation, chiplet architecture, and timing sign-off capabilities for multi-billion-gate SoCs down to 5nm and 2nm nodes.
2. Increase Engineering Reuse: Scale modular solution accelerators (AgenticSky™, ProductXcelerate™, and DigitalSky GenAIoT) to eliminate repetitive foundational work and decouple revenue growth from linear headcount additions.
3. Expand Programme Responsibility: Transition customer relationships from isolated engineering work packages toward full-stack turnkey ownership spanning silicon, package, board, embedded firmware, cloud systems, and post-silicon validation.
4. Deepen Vertical Relevance: Apply domain-specific context across six core industries—Semiconductors, Computing & Communication, Industrial, Energy, Automotive, and Consumer Electronics—as well as national space and defence programmes.
5. Build the Capacity to Scale: Invest in MAST academy training, global sales leadership in North America, Europe, Japan, and Korea, expanded office infrastructure, and ecosystem alliances.

Capitalizing on Global and Indian Semiconductor Tailwinds (Semicon 2.0)

MosChip’s strategy is aligned with structural growth across both global and domestic semiconductor markets. Industry forecasts cited in the MD&A project the global semiconductor market to approach US$1 trillion by 2026 and reach US$1 trillion to US$1.5 trillion by the early 2030s, while India’s semiconductor market is projected to expand from US$38 billion in 2023 to US$100–110 billion by 2030. In particular, MosChip aims to leverage the Government of India’s newly approved Semicon 2.0 Programme—backed by a fiscal outlay of ₹1,27,500 crore—alongside the Design Linked Incentive (DLI) scheme and National Supercomputing Mission to commercialize indigenous IP like the VIDYUT Smart Energy Meter IC (Q1 FY27 full-chip tapeout; Q1 FY28 production tapeout, Management target) and partner with large global enterprises for joint product development.

Quantitative ESG & Sustainability Targets (2030 & 2040)

In Section B of its BRSR report, MosChip established time-bound Environmental, Social, and Governance targets:

• Gender Diversity Targets (FY 2030): Achieve 40% representation of women employees across the workforce and increase women’s representation in senior leadership and decision-making roles to 30% by FY 2030 (Management target).
• Carbon Neutrality & Renewable Energy (FY 2030): Reduce absolute Scope 1 and Scope 2 greenhouse gas (GHG) emissions by 100% by FY 2030 (using FY 2023-24 as the baseline year) to achieve carbon-neutral operations, and source 100% of electricity consumption from renewable energy sources by FY 2030 (Management target).
• Net-Zero Emissions (2040): Achieve Net-Zero GHG emissions by 2040 through decarbonization, renewable energy adoption, and energy efficiency initiatives (Management target).

Key strengths

MosChip’s operational resilience and financial trajectory are supported by concrete, disclosed competitive advantages:

• End-to-End Silicon-to-Systems Integration: By owning the middle engineering layers (package, board, and firmware) between Silicon Engineering and Product Engineering, MosChip eliminates multi-vendor handoff failures across complex electronic products.
• Proven Advanced-Node & Turnkey Heritage: With 600+ silicon tapeouts (including 200+ SoC tapeouts), process experience from 180nm to 2nm, and active turnkey execution on 5nm (C-DAC AUM HPC processor), 22nm (EMASS Edge AI SoC), and 28nm (SAC/ISRO navigation SoC) programmes, the company possesses rare post-tapeout validation and packaging depth.
• Tier-1 Ecosystem Alliances & Memberships: MosChip is a member of the TSMC Design Center Alliance (DCA) and maintains technology partnerships and alliances with Infineon, Renesas, Tenstorrent, InnoPhase IoT, Microchip (FPGA Design Partner), Altera, CEVA, BrainChip, AMD, Lattice Semiconductor, Secure-IC, Movellus, and Litmus, alongside industry memberships in IESA, Design & Reuse, AnySilicon, UCIe (Universal Chiplet Interconnect Express), and FICCI.
• Youthful, Gender-Diverse, High-Retention Workforce: As of March 31, 2026, MosChip’s total workforce reached 1,760 employees (1,624 permanent and 136 other than permanent), with women representing 34% of total employees (572 women) and 32% of permanent employees (524 women). The workforce has an average age of 28 years, and permanent employee turnover declined to 10.78% in FY26 (8.25% male, 2.53% female) from 13.41% in FY25, remaining well below the 20% industry attrition average.
• Internal Talent Pipeline & Broad ESOP Alignment: Through its in-house MAST training academy, an increase in median employee remuneration by 18.42% (Calculated by FirmsWorld, rising from ₹9,50,004 in FY25 to ₹11,25,000 in FY26), an average non-managerial salary increase of 25.8%, and ESOP eligibility extending even to freshers who complete 3 years of service, MosChip has experienced little to no leadership attrition in recent years.
• Recognized Employer & Growth Credentials: In 2025, MosChip was ranked 13th among LinkedIn’s Top 15 Mid-Size Companies in India, 245th among Asia-Pacific High-Growth Companies, and within the top 50 in a nationwide employer assessment covering 600 companies.

Key challenges and risks

In its Management Discussion & Analysis, Risk & Resilience section, and BRSR materiality matrix, MosChip identifies key operational, macroeconomic, and technological risks alongside its mitigation strategies:

• Geopolitical, Trade & Regional Conflict Risk: Export controls, US–China trade tensions, and potential geopolitical instability in Taiwan pose risks to semiconductor tool access, IP collaboration, and global supply chains. MosChip mitigates this by diversifying its geographic footprint across India, North America, Europe, Japan, and Korea, tightening cross-border IP governance, and participating in domestic Indian semiconductor programmes.
• Talent Scarcity & Niche Skill Attrition Risk: Rapid technological shifts in AI and advanced-node VLSI create fierce competition for scarce engineering skills. The company counters talent risk through continuous re-skilling, campus hiring, its MAST training subsidiary, and broad-based ESOP retention incentives.
• Intellectual Property (IP) & Cybersecurity Risk: Because MosChip holds high-value customer IP and sensitive design data, any data breach or IP infringement could trigger severe litigation and reputational damage. Mitigation includes strict physical access controls at customer-dedicated design centers, cybersecurity monitoring, and regular third-party security audits mandated under its TSMC Design Center Alliance (DCA) membership.
• Customer & Market Concentration Risk: Dependence on limited geographies or client segments can expose revenues to localized downturns. MosChip actively mitigates concentration risk by expanding into Europe and South Korea and broadening its vertical footprint across automotive, industrial, energy, and consumer electronics.
• Foreign Currency Volatility Risk: A substantial portion of MosChip’s revenue is earned in US dollars while operating costs are incurred predominantly in Indian rupees. Management utilizes natural hedging and periodically reviews its foreign exchange hedging policy to protect operating margins.
• Technology Disruption & Pricing Competition Risk: Rapid advances in Generative and Agentic AI are transforming both what customers build and how chips and software are engineered, while industry competition exerts pricing pressure. MosChip addresses this by embedding AI directly into its internal design and verification workflows and differentiating via higher-value turnkey and platform-led accelerators (AgenticSky™ and ProductXcelerate™).
• Climate, Regulatory Compliance & Litigation Risk: Evolving environmental regulations, extreme weather events, and multi-jurisdictional legal frameworks require continuous vigilance. MosChip maintains an in-house compliance team, upgrades its Disaster Recovery Planning infrastructure, disposes of e-waste through authorized recyclers, and enforces zero-tolerance governance—recording Nil complaints across all stakeholder groups, Nil POSH complaints, and Nil regulatory penalties during FY26.

Conclusion and strategic outlook

MosChip Technologies Limited’s 27th Annual Report portrays a company transitioning from a specialized semiconductor design house into an integrated, full-stack “Silicon to Smart Systems” engineering partner. By pairing 25.34% consolidated revenue growth (reaching ₹585.15 crore) and a 41% five-year revenue CAGR with a net-cash balance sheet (₹149.28 crore in cash and deposits against ₹35.95 crore in short-term debt), the company has demonstrated its ability to fund aggressive workforce and infrastructure expansion while preserving financial stability.

Looking ahead to FY27 and beyond, MosChip is positioned at the confluence of three major catalysts: the post-merger operational integration of Softnautics, the commercial scaling of its AgenticSky™ and ProductXcelerate™ solution accelerators across North America, Europe, and Asia-Pacific, and the upcoming Q1 FY27 full-chip tapeout of its indigenous VIDYUT Smart Energy Meter IC. Supported by 1,700+ engineers, TSMC DCA accreditation, and deep participation in India’s national space, supercomputing, and semiconductor missions, MosChip enters its twenty-eighth year with the technical depth and balance sheet liquidity required to capture long-term structural growth across the global silicon and product engineering lifecycle.

Official Site: https://www.moschip.com/